On Tue, 31 Jul 2007 10:38:48 +0200
Zoltan Menyhart <[email protected]> wrote:
> David Mosberger-Tang wrote:
> > This seems crazy to me. Flushing should occur according to the
> > *architecture*, not model-by-model. Even if we happen to get "lucky"
> > on pre-Montecito CPUs, that doesn't justify such ugly hacks. Or you
> > really want to debug this *again* come next CPU?
> >
> > --david
>
> O.K. let's say we flush by default: the global flag is set.
>
> We can have a (short) list of the CPU models which do not require
> this flush.
>
> If all of the CPUs are on the list then clear the global flag. And:
>
> static inline void sync_icache_dcache(pte_t pte) {
> if (pte_exec(pte) && global_flag)
> __sync_icache_dcache(pte);
> }
>
Could we discuss this in other thread as "optimization for some cpus" and
push bug-fix patches first ?
If take5 or part of take6(patch 1,2) are not acceptable, I'll continue this
work on -rc2.
Thanks,
-Kame
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