> So if, after this, we run tsc_sched_clock() with an unstable TSC, we
> read a last_val containing the interrupt's MSB and the last_val LSB. It
> can particularity hurt if we are around a 32 bits overflow, because time
> could "jump" forward of about 1.43 seconds on a 3 GHz system.
>
> So I guess we need synchronization on the fast path, and therefore using
> cmpxchg_local on x86_64
On x86-64 the 64bit write is atomic against interrupts.
You're right 32bit has a problem though. I'm not too happy about
cmpxchg though because that wouldn't work on some CPUs.
I wonder if we can just get away with using a 32bit value on i386.
Just for the purpose of keeping the value monotonic it should be good
enough. Will think about it.
Thanks for the review.
-Andi
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