> Maybe you need to do something with the cache bits in CR0 as well. It
> could be something like that. Hardware can be stuborn. I remember the
> old Winchips (C3 predecessors) hanging when trying to disable caching of
> plain ram via MCR's for instance.
>
I did it like in chapter 10.5.3. Result is exacly the same - processor
stops. If I set NW flag CPU is still going, but I have "exception in
interrupt" message.
I'm starting thinking that this will not work for "Nehemiah" core.
Thanks
Rafał
----------------------------------------------------------------------
PS. Fajny portal... >>> http://link.interia.pl/f196a
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