RE: Dual core Athlons and unsynced TSCs

[Steven Rostedt <rostedt@goodmis.org>]

On Fri, 2006-01-13 at 17:50 -0800, john stultz wrote:
> On Fri, 2006-01-13 at 20:43 -0500, Steven Rostedt wrote:
> > On Fri, 13 Jan 2006, john stultz wrote:
> > 
> > >
> > > This is as I understand it:
> > >
> > > With 2.6.15 on x86-64:
> > > 	If available, alternate timesources (HPET, ACPI PM) will be used if
> > > available on AMD SMP systems. (clock= is i386 only)
> > 
> > Hmm, should I boot without the clock= to prove this?
> 
> Feel free. That or grep the x86-64 time.c code.
> 
> Look for:
> 	time.c: Using PM based timekeeping.
> 
> To verify the timesource selection.

So much for not looking at code! 

I uploaded yet another version of 
http://www.kihontech.com/tests/rt/monotonic.c
that now also tests the tsc too, to see if it goes backwards.  If it
does, then it prints (only once) that fact and continues testing the
gettime function.

So this proves that the tsc does go back and the gettime still is
working.


$ ./monotonic
main program pid=7137
hello from thread 0!
hello from thread 4!
last tsc is 4389431102233  this tsc is 4389429636684
hello from thread 1!
hello from thread 2!
hello from thread 3!

-- Steve



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