Hi Krzysztof, > > In I2C mode, you can even alternate as many read and write sequences > > you want in a single transaction. The target chip would of course > > need to know how to interpret such a transaction though. I've never > > seen this possibility used so far. > > Is this mode supported by the common (such as VIA south bridge) > controllers? No it's not, for the simple reason that south bridges are almost always SMBus controllers, not I2C controllers. That being said, I'd be surprised if it ever matters. I never saw such transactions, and if some chip was to accept them, it would most probably also accept a sequence of more simple, SMBus-compatible transactions to achieve the same goal. If you have further questions, they are welcome but I'd suggest that you drop LKML from the recipients and follow up on the lm_sensors list only, as we are getting somewhat off-topic now. -- Jean Delvare - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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