Jean Delvare <[email protected]> writes:
> In I2C mode, you can even alternate as many read and write sequences you
> want in a single transaction. The target chip would of course need to
> know how to interpret such a transaction though. I've never seen this
> possibility used so far.
Is this mode supported by the common (such as VIA south bridge)
controllers?
> In SMBus mode, you are limited by the transaction types that have been
> defined, but a number of them are composed of a write transaction and a
> read transaction (separated by what is known as a "repeated start").
> Read Byte, Read Word, Read Block and Read I2C Block are such
> transactions. See the SMBus specification for the details.
Ok. I guest there are just different codes for 8- and 16-bit addressing.
> The I2C specifications are available from Philips. The SMBus
> specifications are available from smbus.org. Intel also has good
> datasheets for all ICH chips.
>
> http://www.semiconductors.philips.com/markets/mms/protocols/i2c/
> http://www.smbus.org/specs/
>
> More generally, see the lm_sensors project's links page:
> http://www2.lm-sensors.nu/~lm78/cvs/lm_sensors2/doc/useful_addresses.html
> and also:
> http://secure.netroedge.com/~lm78/docs.html
>
> Hope that helps,
Sure. Thanks.
--
Krzysztof Halasa
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