On Fri, 2005-04-08 at 01:58 +0200, Andreas Schwab wrote: > Benjamin Herrenschmidt <[email protected]> writes: > > > Yes, that's very extreme, I suspect somebody is banging on set_par or > > something like that. > > fb_setcolreg is it. Ahhh... interesting. I'll see if I can find a way to work around that one. Best would be to "cache" the current PLL register index in fact, but I'm afraid that may not work terribly well with userland apps hacking it ... Ben. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
- References:
- Re: [PATCH] radeonfb: (#2) Implement proper workarounds for PLL accesses
- From: Andreas Schwab <[email protected]>
- Re: [PATCH] radeonfb: (#2) Implement proper workarounds for PLL accesses
- From: Benjamin Herrenschmidt <[email protected]>
- Re: [PATCH] radeonfb: (#2) Implement proper workarounds for PLL accesses
- From: Andreas Schwab <[email protected]>
- Re: [PATCH] radeonfb: (#2) Implement proper workarounds for PLL accesses
- From: Benjamin Herrenschmidt <[email protected]>
- Re: [PATCH] radeonfb: (#2) Implement proper workarounds for PLL accesses
- From: Andreas Schwab <[email protected]>
- Re: [PATCH] radeonfb: (#2) Implement proper workarounds for PLL accesses
- From: Dave Airlie <[email protected]>
- Re: [PATCH] radeonfb: (#2) Implement proper workarounds for PLL accesses
- From: Benjamin Herrenschmidt <[email protected]>
- Re: [PATCH] radeonfb: (#2) Implement proper workarounds for PLL accesses
- From: Andreas Schwab <[email protected]>
- Re: [PATCH] radeonfb: (#2) Implement proper workarounds for PLL accesses
- Prev by Date: Re: iomapping a big endian area
- Next by Date: Re: [PATCH 2.6.11] aoe [7/12]: support configuration of AOE_PARTITIONS from Kconfig
- Previous by thread: Re: [PATCH] radeonfb: (#2) Implement proper workarounds for PLL accesses
- Next by thread: Re: [PATCH] radeonfb: (#2) Implement proper workarounds for PLL accesses
- Index(es):
 |