On Nov 29, 2007 6:54 PM, Eric W. Biederman <[email protected]> wrote:
> Ben Woodard <[email protected]> writes:
>
>
> > Eric W. Biederman wrote:
> >> Vivek Goyal <[email protected]> writes:
> >>
> >>> Ok. Got it. So in this case we route the interrupts directly through LAPIC
> >>> and put LVT0 in ExtInt mode and IOAPIC is bypassed.
> >>>
> >>> I am looking at Intel Multiprocessor specification v1.4 and as per figure
> >>> 3-3 on page 3-9, 8259 is connected to LINTIN0 line, which in turn is
> >>> connected to LINTIN0 pin on all processors. If that is the case, even in
> >>> this mode, all the CPU should see the timer interrupts (which is coming
> >>> from 8259)?
> >>
there is two mode for mcp55. bios should have one option about virtul
wired to LVT0 of BSP or IOAPIC pin 0.
or the option like hpet route to ioapic pin 2.
for kdump fix, could enable LVT0 of CPU for kdump and disable that for BSP?
ben,
can you send out
lspci -vvxxx -s 00:1.0
YH
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