On Fri, 23 Nov 2007, Arne Georg Gleditsch wrote:
> dean gaudet <[email protected]> writes:
> > on AMD x86 pre-family 10h the boundary is 8 bytes, and on fam 10h it's 16
> > bytes. the penalty is a mere 3 cycles if an access crosses the specified
> > boundary.
>
> Worth noting though, is that atomic accesses that cross cache lines on
> an Opteron system is going to lock down the Hypertransport fabric for
> you during the operation -- which is obviously not so nice.
ooh awesome, i hadn't measured that before.
on a 2 node sockF / revF with a random pointer chase running on cpu 0 /
node 0 i see the avg load-to-load cache miss latency jump from 77ns to
109ns when i add an unaligned lock-intensive workload on one core of node
1. the worst i can get the pointer chase latency to is 273ns when i add
two threads on node 1 fighting over an unaligned lock.
on a 4 node (square) the worst case i can get seems to be an increase from
98ns with no antagonist to 385ns with 6 antagonists fighting over an
unaligned lock on the other 3 nodes.
cool.
-dean
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