RE: [patch][v2] x86, ptrace: support for branch trace store(BTS)

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>-----Original Message-----
>From: dean gaudet [mailto:[email protected]] 
>Sent: Dienstag, 20. November 2007 16:27
>To: Metzger, Markus T
>Cc: [email protected]; [email protected]; 
>[email protected]; [email protected]; [email protected]; Siddha, Suresh 
>B; [email protected]
>Subject: Re: [patch][v2] x86, ptrace: support for branch trace 
>store(BTS)
>
>On Tue, 20 Nov 2007, Metzger, Markus T wrote:
>
>> +__cpuinit void ptrace_bts_init_intel(struct cpuinfo_x86 *c)
>> +{
>> +	switch (c->x86) {
>> +	case 0x6:
>> +		switch (c->x86_model) {
>> +#ifdef __i386__
>> +		case 0xD:
>> +		case 0xE: /* Pentium M */
>> +			ptrace_bts_ops = ptrace_bts_ops_pentium_m;
>> +			break;
>> +#endif /* _i386_ */
>> +		case 0xF: /* Core2 */
>> +			ptrace_bts_ops = ptrace_bts_ops_core2;
>> +			break;
>> +		default:
>> +			/* sorry, don't know about them */
>> +			break;
>> +		}
>> +		break;
>> +	case 0xF:
>> +		switch (c->x86_model) {
>> +#ifdef __i386__
>> +		case 0x0:
>> +		case 0x1:
>> +		case 0x2:
>> +		case 0x3: /* Netburst */
>> +			ptrace_bts_ops = ptrace_bts_ops_netburst;
>> +			break;
>> +#endif /* _i386_ */
>> +		default:
>> +			/* sorry, don't know about them */
>> +			break;
>> +		}
>> +		break;
>
>is this right?  i thought intel family 15 models 3 and 4 
>supported amd64
>mode...

That's correct. 
In 32bit mode, they would use the BTS format that I implemented for
Netburst. 
In 64bit mode, they would use a slightly different format, which is not
implemented.

We might want to add support for Netburst in 64bit mode some day. 
For today, I simply exclude Netburst for x86_64.


regards,
markus.

>
>-dean
>
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