On Wed, 3 Oct 2007, Pekka Enberg wrote:
>
> On 10/3/07, Linus Torvalds <[email protected]> wrote:
> > I would bet that the reason the intel-optimized memcpy triggers this is
> > that the non-temporal stores just means that you go out directly on the
> > bus, and it probably just shows a weakness in the chipset or bus that
> > doesn't show with the normal cacheline accesses.
>
> But that should show up with memtest too, no?
Not unless memtest uses non-temporal stores with the same (or similar)
access patterns.
The thing is, the CPU cache hides a *lot* of activity from the chipset,
and changes the access patterns radically.
With normal cached accesses, you'd normally see just the "fill cacheline"
and "write out cacheline" pattern. With movnt, you'd see non-cacheline
accesses to memory. If the chipset was tested under mostly normal loads,
the movnt cases have been getting a lot less coverage.
Now, I do agree that it certainly *can* be a CPU bug too. I doubt it,
though.
I'd check the power supply (brownouts cause random corruption, and it
might have a "peak power pattern" thing to it), and it's worth re-seating
any DIMM's etc. And it's definitely worth going into the BIOS setup screen
and making sure that nothing is even close to debatable (ie take RAM
timings down to non-aggressive levels, make sure bus frequencies and
multipliers are not even close to borderline, etc etc).
Linus
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