Well if there is only one memory location involved, then smp_rmb() isn't going to really do anything anyway, so it would be incorrect to use it.rmb() orders *any* two reads; that includes two reads from the same location.If the two reads are to the same location, all CPUs I am aware of will maintain the ordering without need for a memory barrier.That's true of course, although there is no real guarantee for that.A CPU that did not provide this property ("cache coherence") would be most emphatically reviled.
That doesn't have anything to do with coherency as far as I can see.It's just about the order in which a CPU (speculatively) performs the loads
(which isn't necessarily the same as the order in which it executes the corresponding instructions, even).
So we are pretty safe assuming that CPUs will provide it.
Yeah, pretty safe. I just don't like undocumented assumptions :-) Segher - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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