On Tue, Aug 07, 2007 at 06:15:37PM -0400, Cal Peake wrote:
> On Fri, 3 Aug 2007, Linus Torvalds wrote:
>
> > > MSR_K8_ENABLE_C1E lo == 0x04c14015
> > > MSR_K8_ENABLE_C1E hi == 0x00000000
> > > lo & ENABLE_C1E_MASK == 0
> >
> > And yeah, that claims that C1E is not on, but:
> >
> > > amd_apic_timer_broken: forcing return value of 1
>
> So it seems my initial debugging report was, err, incomplete. I failed to
> notice that the amd_apic_timer_broken function was getting called twice,
> once for each core.
>
> The second call shows this:
>
> MSR_K8_ENABLE_C1E == 0x14c14015
Ah interesting. Ok finally that all starts making sense.
Not sure why the MSR varies between cores though.
> which causes our ENABLE_C1E_MASK check to be true and thus properly
> return 1 from the function. So when we call the above function from
> init_amd we prolly need to do a
>
> set_bit(X86_FEATURE_LAPIC_TIMER_BROKEN, c->x86_capability);
>
> for each core if any of them happen to return true upon checking for a
> broken timer.
It's better to just make it a global instead.
-Andi
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