Re: [PATCH] flush icache before set_pte take6. [4/4] optimization for cpus other than montecito

Jim Hull wrote:

Not just crazy, but wrong - this *can* happen on pre-Montecito.  Even though
L1D is write-through and L2 was mixed I/D, the L1 I-cache could contain
stale instrutions if there are missing flushes.

I cannot agree with you.

In order to consider an L1 I-cache entry as valid, a corresponding
virtual -> physic address translation should be valid in one of the L1 ITLBs.

"See 6.1.1. Instruction TLBS" of the I2 Proc. Ref. Man. for SW Dev. & Opt.

You cannot have a valid L1 ITLB entry unless you have a corresponding valid
L2 ITLB entry.

When you remove a PTE (or switch off the exec bit) and you flush the L2 ITLB
matching the old translation (and you kill the corresponding L1 ITLBs),
you do invalidate the corresponding L1 I-cache entries.

Therefore CPU models without split L2 caches are safe.

Thanks,

Zoltan
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to [email protected]
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

---

• References:
  • [PATCH] flush icache before set_pte take6. [0/4]
    • From: KAMEZAWA Hiroyuki <[email protected]>
  • [PATCH] flush icache before set_pte take6. [4/4] optimization for cpus other than montecito
    • From: KAMEZAWA Hiroyuki <[email protected]>
  • Re: [PATCH] flush icache before set_pte take6. [4/4] optimization for cpus other than montecito
    • From: "David Mosberger-Tang" <[email protected]>
  • Re: [PATCH] flush icache before set_pte take6. [4/4] optimization for cpus other than montecito
    • From: KAMEZAWA Hiroyuki <[email protected]>
  • RE: [PATCH] flush icache before set_pte take6. [4/4] optimization for cpus other than montecito
    • From: "Jim Hull" <[email protected]>

• Prev by Date: Re: [patch] add kdump_after_notifier
• Next by Date: Re: [RFC PATCH] type safe allocator
• Previous by thread: RE: [PATCH] flush icache before set_pte take6. [4/4] optimization for cpus other than montecito
• Next by thread: Re: [PATCH] flush icache before set_pte take6. [4/4] optimization for cpus other than montecito
• Index(es):
  • Date
  • Thread

[Index of Archives]     [Kernel Newbies]     [Netfilter]     [Bugtraq]     [Photo]     [Stuff]     [Gimp]     [Yosemite News]     [MIPS Linux]     [ARM Linux]     [Linux Security]     [Linux RAID]     [Video 4 Linux]     [Linux for the blind]     [Linux Resources]