On Fri 20 Jul 2007 16:28, Mathieu Desnoyers pondered:
>
> I also don't like the comment in asm-blackfin/atomic.h :
>
> * Generally we do not concern about SMP BFIN systems, so we don't have
> * to deal with that.
>
> I have seen on the blackfin website that you actually sell a board with
> SMP. Why aren't you caring about it ?
Just because something is dual core - doesn't mean it is capable of true SMP.
The 2 blackfin cores on the BF561 have their own L1 cache, but the caches are
not coherent to the internal L2 (which is not cache, but just memory), or
external L3.
This precludes SMP where common memory must be addressed by both cores.
-Robin
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