Re: [patch -mm 26/28] x86-64 block irq balancing for timer

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To: Arjan van de Ven <[email protected]>
Subject: Re: [patch -mm 26/28] x86-64 block irq balancing for timer
From: Andreas Kleen <[email protected]>
Date: Sun, 24 Jun 2007 02:04:05 +0200
Cc: Thomas Gleixner <[email protected]>, Andrew Morton <[email protected]>, Ingo Molnar <[email protected]>, Venkatesh Pallipadi <[email protected]>, John Stultz <[email protected]>, Chris Wright <[email protected]>, LKML <[email protected]>
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Am Sat 23 Jun 2007 11:27:20 PM CEST schrieb Arjan van de Ven<[email protected]>:

On Sat, 2007-06-23 at 13:32 +0000, Thomas Gleixner wrote:

plain text document attachment
(x86-64-clockevents-irq-balancing.patch)
From: Venki Pallipadi <[email protected]>

Disable irq balancing on IRQ0.



this patch is missing some rationale....


Several SIS chipsets lock up when you try to change affinity of IRQ #0

-Andi

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Follow-Ups:
- Re: [patch -mm 26/28] x86-64 block irq balancing for timer
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References:
- [patch-mm 00/28] High resolution timer updates and x86_64 support - V3
  - From: Thomas Gleixner <[email protected]>
- [patch -mm 26/28] x86-64 block irq balancing for timer
  - From: Thomas Gleixner <[email protected]>
- Re: [patch -mm 26/28] x86-64 block irq balancing for timer
  - From: Arjan van de Ven <[email protected]>

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