On Wednesday, May 23, 2007 2:54 pm Linus Torvalds wrote:
> On Wed, 23 May 2007, Jesse Barnes wrote:
> > > You told it to not forward memory. Why complain when it does as
> > > told?
> >
> > Well, because that's not actually very useful functionality, and
> > likely makes software that seems "obviously" correct wrt the PCI
> > spec break.
>
> I agree that a chip that doesn't do it isn't broken either, but the
> fact is, there is never any reason to disable MEM/IO on a host
> bridge. Doing so is senseless - it can never be a valid operation. So
> I duspute the "obviously correct" part. It's _not_ obviously correct
> at all.
>
> To get back to the MMIO example: even if you were to never shut off
> RAM, if you turn off just PCI MMIO on the northbridge, what is a
> mmconfig cycle supposed to do? It's not going to _work_ if you
> disable MEM accesses.
>
> So again, the only sane situation is: don't do it then! You claim
> that hardware shouldn't do it, but I don't think software is in any
> different situation at all! If it's insane to do, then software
> shouldn't do it.
>
> It's just insane to turn off the MEM bit. There's simply no valid
> reason to. And any PCI spec that says you should is *broken*, or
> written by somebody who really only meant to talk about normal PCI
> devices, not bridges.
Well theoretically for just sizing BARs, turning off the MEM bit should
be fine, since your next accesses should only be to config space until
the MEM bit is reenabled. But if RAM accesses really are disabled,
then you'd better be sure all the code you need is already in cache, or
you'll get into trouble.
So yeah, I guess special handling for host bridges is needed, but that
doesn't seem like a big deal.
> > Apparently Vista will move away from using type 1 config space
> > accesses though, so if we keep using it, we'll probably run into
> > some lame board that assumes you're using mmconfig at some point in
> > the near future.
>
> How are those boards going to set up mmconfig? The whole standard is
> broken, since there is no way to set it up.
>
> Trust the firmware? What a piece of crap!
What do you mean? You set it up the normal way, by poking at config
space to see what's there, then size the BARs (disabling mem and I/O
accesses in PCI_COMMAND shouldn't affect config space cycles afaik).
You just have to be careful to disable decoding for I/O and memory
regions, especially if your mmconfig space overlaps with what the
devices end up with in their BARs. Which is why my initial patch works
ok (because fortunately the Intel host bridges hard code the mem decode
bit to 1 too).
Jesse
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