From: Muli Ben-Yehuda <[email protected]> Signed-off-by: Muli Ben-Yehuda <[email protected]> --- arch/x86_64/kernel/pci-calgary.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86_64/kernel/pci-calgary.c b/arch/x86_64/kernel/pci-calgary.c index 0bb0eb0..1df556c 100644 --- a/arch/x86_64/kernel/pci-calgary.c +++ b/arch/x86_64/kernel/pci-calgary.c @@ -808,13 +808,13 @@ static void __init calgary_reserve_regio iommu_range_reserve(tbl, bad_dma_address, EMERGENCY_PAGES); /* avoid the BIOS/VGA first 640KB-1MB region */ - /* for CalIOC2 - avoid the entire first 2MB */ + /* for CalIOC2 - avoid the entire first MB */ if (is_calgary(dev->device)) { start = (640 * 1024); npages = ((1024 - 640) * 1024) >> PAGE_SHIFT; } else { /* calioc2 */ start = 0; - npages = (2 * 1024 * 1024) >> PAGE_SHIFT; + npages = (1 * 1024 * 1024) >> PAGE_SHIFT; } iommu_range_reserve(tbl, start, npages); -- 1.4.4 - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
- Follow-Ups:
- References:
- Calgary updates for 2.6.23
- From: [email protected]
- [PATCH 1/15] x86-64: Calgary - generalize calgary_increase_split_completion_timeout
- From: [email protected]
- [PATCH 2/15] x86-64: Calgary - update copyright notice
- From: [email protected]
- [PATCH 3/15] x86-64: Calgary - introduce handle_quirks() for various chipset quirks
- From: [email protected]
- [PATCH 4/15] x86-64: Calgary - introduce chipset specific ops
- From: [email protected]
- [PATCH 5/15] x86-64: Calgary - abstract how we find the iommu_table for a device
- From: [email protected]
- [PATCH 6/15] x86-64: Calgary - introduce CalIOC2 support
- From: [email protected]
- [PATCH 7/15] x86-64: Calgary - add chip_ops and a quirk function for CalIOC2
- From: [email protected]
- [PATCH 8/15] x86-64: Calgary - implement CalIOC2 TCE cache flush sequence
- From: [email protected]
- [PATCH 9/15] x86-64: Calgary - make dump_error_regs a chip op
- From: [email protected]
- [PATCH 10/15] x86-64: Calgary - grab PLSSR too when a DMA error occurs
- From: [email protected]
- [PATCH 11/15] x86-64: Calgary - reserve TCEs with the same address as MEM regions
- From: [email protected]
- [PATCH 12/15] x86-64: Calgary - cleanup of unneeded macros
- From: [email protected]
- [PATCH 13/15] x86-64: Calgary - tabify and trim trailing whitespace
- From: [email protected]
- Calgary updates for 2.6.23
- Prev by Date: [PATCH 8/15] x86-64: Calgary - implement CalIOC2 TCE cache flush sequence
- Next by Date: [PATCH 7/15] x86-64: Calgary - add chip_ops and a quirk function for CalIOC2
- Previous by thread: [PATCH 13/15] x86-64: Calgary - tabify and trim trailing whitespace
- Next by thread: [PATCH 15/15] x86-64: Calgary - tidy up debug printks
- Index(es):