>
> actually I wanted to write that "HT as implemented on XEONs did not
> help a lot for HPC workloads in the past"....
btw this is exactly the problem I am trying to point out: ".. as
implemented in generation XYZ model ABC of processor DEF".
that's going to be really fragile and in fact won't work even for
processors you can buy today (power5 and sparc niagara for example, and
depending on the workload, even on todays 16Mb cache Xeons).
once your program (and many others) have such a check, then the next
step will be pressure on the kernel code to "fake" the old situation
when there is a processor where <vague criteria of the day> no longer
holds. It's basically a road to madness :-(
--
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