Re: [PATCH 4/10] cxgb3 - HW access routines - part 2

Arjan van de Ven wrote:

+void t3_port_intr_disable(struct adapter *adapter, int idx)
+{
+	struct cphy *phy = &adap2pinfo(adapter, idx)->phy;
+
+	t3_write_reg(adapter, XGM_REG(A_XGM_INT_ENABLE, idx), 0);
+	phy->ops->intr_disable(phy);

you seem to be missing a pci posting flush here....

Thanks for catching this. Will fix.
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    • From: [email protected]
  • Re: [PATCH 4/10] cxgb3 - HW access routines - part 2
    • From: Arjan van de Ven <[email protected]>

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