Re: [PATCH 4/10] cxgb3 - HW access routines - part 2

> +void t3_port_intr_disable(struct adapter *adapter, int idx)
> +{
> +	struct cphy *phy = &adap2pinfo(adapter, idx)->phy;
> +
> +	t3_write_reg(adapter, XGM_REG(A_XGM_INT_ENABLE, idx), 0);
> +	phy->ops->intr_disable(phy);

you seem to be missing a pci posting flush here....



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