Avi Kivity wrote:
> Very interesting.
>
> Will it work on load/store architectures? Since all memory access is
> through a register, won't the constraint generate a useless register
> load (and a use of the variable)?
Don't know; interesting question. It might be worth lobbying the gcc
folks for an asm() constraint which means "pretend this is being
read/written, but don't generate any code, and raise an error if the asm
actually tries to use it". Or perhaps there's some way to do that already.
On the other hand, load/store archs tend to have lots of registers
anyway, so maybe it isn't a big deal.
J
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