Jeremy Fitzhardinge wrote:
Like "volatile" variables, I think "asm volatile" is probably overused.
If you want to guarantee specific ordering of asms, it's probably better
to add an explicit dependency between them rather than rely on asm
volatile; this could either be a "memory" clobber, or something more
fine-grained. For example:
/* need never be instansiated; never actually referenced */
extern int spin_sequencer;
/* %0 never referenced */
asm("take spinlock" : "+m" (spin_sequencer)...);
...
/* again, %0 never referenced */
asm("release spinlock" : "+m" (spin_sequencer)...);
Very interesting.
Will it work on load/store architectures? Since all memory access is
through a register, won't the constraint generate a useless register
load (and a use of the variable)?
--
Do not meddle in the internals of kernels, for they are subtle and quick to panic.
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