yap Andreas Arens send the patch just for me, I am sending it to the maling lists. On Thu, 2006-11-16 at 01:38 +0000, Sergio Monteiro Basto wrote: > On Wed, 2006-11-15 at 19:40 +0100, Andreas Arens wrote: > > as I see from the dmesg on the Fedora bugzilla, your acpi tables > > don't provide an entry to the HPET timer. > > > As the VIA8237 happens to have a built-in HPET, I was able to force it > > on using the > > attached patch (against 2.6.18) on an X2 system with the same > > problem, which greatly improved the system stability for me. > > But I have one Intel(R) Pentium(R) D CPU 2.8 on a VIA8237 > My latest suspect of the root of the problem of my computer is not in > Processor but in those VIAs. As you find that "don't provide an entry to > the HPET timer on acpi tables" it match, but how do you know that ? > I don't send DSDT on bugzilla > > > > The patch is hand-crafted from some older clock-tick kernel tree > > sources I found by googling. > > > > The thing is hackish and not suitable for mainline inclusion, > > but may be useful nontheless. > > If you find it useful, and it helps you please let me know. > > I try your patch and it give me this differences on dmesg (file attach), > detect a different timer.c but no improvement without notsc boot option > and with notsc the computer got worst. > > > > -- Sérgio M.B.
--- linux-2.6.18-gentoo-r2/arch/x86_64/kernel/time.c.unpatched 2006-11-15 19:29:07.000000000 +0100
+++ linux-2.6.18-gentoo-r2/arch/x86_64/kernel/time.c 2006-11-15 19:30:51.000000000 +0100
@@ -42,6 +42,9 @@
#ifdef CONFIG_X86_LOCAL_APIC
#include <asm/apic.h>
#endif
+#if 1
+#include <linux/pci_ids.h>
+#endif
#ifdef CONFIG_CPU_FREQ
static void cpufreq_delayed_get(void);
@@ -815,6 +818,48 @@
static int hpet_init(void)
{
unsigned int id;
+#if 1
+ union conf_address {
+ struct {
+ u8 reg;
+ u8 func: 3;
+ u8 dev: 5;
+ u8 bus;
+ u8 reserved:7;
+ u8 enable: 1;
+ } bits;
+ u32 dword;
+ };
+ union conf_address ca = {
+ .bits.reg = 0,
+ .bits.dev = 17,
+ .bits.enable = 1
+ };
+ union {
+ struct {
+ u8 control;
+ u8 address[3];
+ } hpet;
+ unsigned raw;
+ } hpet;
+ u32 vendor_id, control;
+
+ control = inl(0xcf8);
+ printk("%X\n", control);
+ outl(ca.dword, 0xcf8);
+ vendor_id = inl(0xcfc);
+ if (vendor_id == (PCI_VENDOR_ID_VIA + (PCI_DEVICE_ID_VIA_8237 << 16))) {
+ hpet.raw = 0xFED00000;
+ hpet.hpet.control = 0x80;
+ ca.bits.reg = 0x68;
+ outl(ca.dword, 0xcf8);
+ outl(hpet.raw, 0xcfc);
+ outl(ca.dword, 0xcf8);
+ vxtime.hpet_address = (inl(0xcfc) & 0xFFFFFF00);
+ printk(KERN_WARNING "time.c: WARNING: Enabled VIA8237 HPET "
+ "at %#lx.\n", vxtime.hpet_address);
+ }
+#endif
if (!vxtime.hpet_address)
return -1;
Attachment:
smime.p7s
Description: S/MIME cryptographic signature
- References:
- AMD X2 unsynced TSC fix?
- From: Lee Revell <[email protected]>
- Re: AMD X2 unsynced TSC fix?
- From: Sergio Monteiro Basto <[email protected]>
- Re: AMD X2 unsynced TSC fix?
- From: Sergio Monteiro Basto <[email protected]>
- Re: AMD X2 unsynced TSC fix?
- From: Andi Kleen <[email protected]>
- Re: AMD X2 unsynced TSC fix?
- From: "Siddha, Suresh B" <[email protected]>
- Re: AMD X2 unsynced TSC fix?
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- Re: AMD X2 unsynced TSC fix?
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