Stephen Hemminger wrote:
On Wed, 15 Nov 2006 00:15:47 +0200 (IST)
[email protected] wrote:
The secod question is how do I make the interrupts be srviced by all CPUs?
I tried through the procfs as described by IRQ-affinity.txt but I can set
the mask to 0F bu then I read back and see it is indeed 0f but after a few
seconds I see it back to 02 (which means only CPU1).
Most likely, the user level irq balance daemon (irqbalanced) is adjusting it?
Having it bounce between cpu's would likely result in a lower performance anyway: you
really want it bound to a single CPU to benefit from cache hits on the various involved
data structs that are needed to receive the data from hardware, do accounting etc.
the userspace irq balance daemon attempts to keep network interrupts on the same cpu for
longer periods. The old obsolete kernel-space daemon did exactly the opposite completely
destroying network performance.
I'm not sure whether this is completely optimal on newer chips like conroe with large
shared caches though...
Cheers,
Auke
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