-----Original Message-----
From: Andrew Morton [mailto:[email protected]]
>I don't really understand what this patch does.
>We have a PCI device with a 64-bit BAR and the size is also 64-bit and
is
>larger than 4G, yes?
Yes
>But the code appears to already be attempting to handle such devices.
>Confused.
The old code will
Try to calculate the sz from lo 32 bit addr reg, and sz is 0 if the 64
bit resource size if 4G above, so it will continue can skip that
register, and it will go on try to treat the hi 32bit addr reg as
another 32 bit resource addr reg.
YH
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