On Thu, 2006-11-02 at 16:26 -0500, Phillip Susi wrote:
> Arjan van de Ven wrote:
> > that's for the 32 bit boundary. THe problem is that there are 31, 30, 28
> > and 26 bit devices as well, and those are in more trouble, and will
> > eventually fall back to GFP_DMA (inside the x86 PCI code; the driver
> > just uses the pci dma allocation routines) if they can't get suitable
> > memory otherwise....
> >
> > It's all nice in theory. But then there is the reality that not all
> > devices are nice pci device that implement the entire spec;)
> >
>
> Right, but doesn't the bounce/allocation routine take as a parameter the
> limit that the device can handle? If the device can handle 28 bit
> addresses, then the kernel should not limit it to only 24 bits.
you're right in theory, but the kernel only has a few pools of memory
available, but not at every bit boundary. there is a 32 bit pool
(GFP_DMA32) on some, a 30-ish bit pool (GFP_KERNEL) on others, and a 24
bit pool (GFP_DMA) with basically nothing inbetween.
--
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