Arjan van de Ven wrote:
that is a nice theory, but unfortunately there is just a lot of "PCI"
hardware out there for which the designers decided to save a bit of
copper and only wire up the lower X address lines (for various values of
X)
Yea, but shouldn't PCI drivers be using another means than allocating
from GFP_DMA? Wasn't there some sort of bounce buffers call I can't
quite remember the details of? That performs any required translations
to bus hardware addresses, and copies the buffer to a more appropriate
location if required, based on the specific requirements of that device?
I know that most 32 bit PCI devices can't handle addresses above the 4
GB mark on 64 bit machines, but those drivers should NOT be limiting DMA
to the first 16 MB. Especially since most machines don't have over 4 GB
of ram anyhow, but quite often original buffers will be above 16 MB.
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