Re: Ordering between PCI config space writes and MMIO reads?

• To: Matthew Wilcox <[email protected]>
• Subject: Re: Ordering between PCI config space writes and MMIO reads?
• From: Roland Dreier <[email protected]>
• Date: Tue, 24 Oct 2006 14:51:30 -0700
• Authentication-results: sj-dkim-2.cisco.com; [email protected]; dkim=pass ( sig from cisco.com verified; );
• Cc: Jeff Garzik <[email protected]>, [email protected], [email protected], [email protected], [email protected], John Partridge <[email protected]>
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• In-reply-to: <[email protected]> (Matthew Wilcox's message of "Tue, 24 Oct 2006 15:47:24 -0600")
• References: <[email protected]> <[email protected]> <[email protected]>
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 > I think the right way to fix this is to ensure mmio write ordering in
 > the pci_write_config_*() implementations.  Like this.

I'm happy to fix this in the PCI core and not force drivers to worry
about this.

John, can you confirm that this patch fixes the issue for you?

Thanks,
  Roland
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