Re: [PATCH 1/3] Fix COW D-cache aliasing on fork

[Nick Piggin <nickpiggin@yahoo.com.au>]

Ralf Baechle wrote:
> On Fri, Oct 20, 2006 at 03:46:35AM +1000, Nick Piggin wrote:
>
>
> > What about if you just flush the caches after write protecting all
> > COW pages? Would that work? Simpler? Better performance? (I don't know)
>
>
> That would require changing the order of cache flush and tlb flush.  To

Can't we just move flush_cache_mm to below the copy_page_range, before
the flush_tlb_mm?

> keep certain architectures that require a valid translation in the TLB
> the cacheflush has to be done first.  Not sure if those architectures need
> a writeable mapping for dirty cachelines - I think hypersparc was one
> of them.

If the cache is dirty, then the TLB must have a writeable mapping in it,
mustn't it? If there is an architecture where this isn't the case, then
the current code is broken anyway, because in your example the T2 thread
is dirtying data right before the mapping gets write protected anyway.

--
SUSE Labs, Novell Inc.
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