Alan Cox wrote:
> Ar Maw, 2006-09-19 am 13:54 -0400, ysgrifennodd Mathieu Desnoyers:
>> Very good idea.. However, overwriting the second instruction with a jump could
>> be dangerous on preemptible and SMP kernels, because we never know if a thread
>> has an IP in any of its contexts that would return exactly at the middle of the
>> jump.
>
> No: on x86 it is the *same* case for all of these even writing an int3.
> One byte or a megabyte,
>
> You MUST ensure that every CPU executes a serializing instruction before
> it hits code that was modified by another processor. Otherwise you get
> CPU errata and the CPU produces results which vendors like to describe
> as "undefined".
I was aware of that this errata existed, but never actually knew the
actual specifics of it. Are these two separate problems or just
one?
a) the errata & a possible thread having an IP leading back within (not
at the start of) the range to be replaced.
b) the errata & replacing single instruction with single instruction of
same size.
In a), there's almost an intractable problem of making sure no IP leads
back within the range to be replaced. In b) we still have to take care
of the errata part, but no worry about the stalled thread with invalid
IP.
> Thus you have to serialize, and if you are serializing it really doesn't
> matter if you write a byte, a paragraph or a page.
I was vaguely aware of the issue on x86. Do you know if this applies the
same on other achitectures?
Also, this is SMP-only, right? (Not that single UP matters for desktop
anymore, but just checking.)
Any pointers to the errata?
Karim
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