Ar Sad, 2006-09-09 am 12:03 +1000, ysgrifennodd Paul Mackerras:
> Currently we have a sync instruction after the store in writel() but
> not one before. The sync after is to keep the writel inside
> spinlocked regions and to ensure that the store is ordered with
> respect to the load in readl() and friends.
The spinlock v writel case is not guaranteed on other platforms and
requires you use mmiowb. The main memory v writel ordering is half
guaranteed for PCI bus only .. viz:
The following is ok
fooblock->command = 1;
writel(&fooblock_phys, pci_addr); /* mem write seen */
The following is not
fooblock->command = 1;
writel(&fooblock_phys, pci_addr);
fooblock->command = 2; /* could occur before PCI */
Alan
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