Suppose I have a chunk of memory that is visible on the PCI bus. I
ioremap_nocache() it into kernel space on multiple cpus. This memory is
not used by any hardware devices, only the various cpus. No DMA is
involved.
What are the rules for portably accessing this memory? I assume that I
need to use readb/readw/readl/writeb/writew/writel and the other mmio
helpers, and can't access it directly? Given that those all give
little-endian access, is there any way to access without the
byte-swapping on big-endian systems?
How can I portably ensure that a write from one cpu will be visible when
another cpu does a read? Do I need to read from the device on the
original cpu, or is there a way to flush it far enough that the other
cpus will get the updated data even if it hasn't made it all the way
back to the device yet?
Thanks,
Chris
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