On Fri, 9 Jun 2006, Chris Friesen wrote:
Someone asked me a question that I couldn't answer, so I thought I'd pass it
on to here.
Suppose I declare an array of a struct type, where the size of the struct is
not a multiple of the cacheline size. Each element in the array is used by a
different cpu.
If I understand it, this would mean that the last member in the data
belonging to one cpu shares a cacheline with the first member in the data
belonging to the next cpu.
Yes. Since an array element position is essentially
base_ptr + sizeof(each_element) * index, if sizeof(each_element) is not a
multiple of the cache line, the next element will start in the middle of a
cache line.
Will this cause cacheline pingpong? If I do this sort of thing do I need to
ensure that the struct is a multiple of cacheline size (or specify cacheline
alignement)?
Yes. If CPU 2 tries to write to struct member 1 of array element 2, and
array element 1 is in CPU 1's cache, it must be invalidated.
GCC (and kernel macros) provide good support for enforced cacheline
alignment, but it's also possible to pad your structures.
Thanks,
Chris
Chase
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