cacheline alignment and per-cpu data

["Chris Friesen" <cfriesen@nortel.com>]

Someone asked me a question that I couldn't answer, so I thought I'd 
pass it on to here.

Suppose I declare an array of a struct type, where the size of the 
struct is not a multiple of the cacheline size.  Each element in the 
array is used by a different cpu.

If I understand it, this would mean that the last member in the data 
belonging to one cpu shares a cacheline with the first member in the 
data belonging to the next cpu.

Will this cause cacheline pingpong?  If I do this sort of thing do I 
need to ensure that the struct is a multiple of cacheline size (or 
specify cacheline alignement)?

Thanks,

Chris
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