Re: [PATCH 53 of 53] ipath - add memory barrier when waiting for writes

• To: [email protected]
• Subject: Re: [PATCH 53 of 53] ipath - add memory barrier when waiting for writes
• From: Roland Dreier <[email protected]>
• Date: Mon, 15 May 2006 16:08:03 -0700
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• Cc: "Bryan O'Sullivan" <[email protected]>, [email protected], [email protected]
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• In-reply-to: <[email protected]> ([email protected]'s message of "Mon, 15 May 2006 16:01:20 -0700 (PDT)")
• References: <[email protected]> <[email protected]> <[email protected]> <[email protected]>
• Sender: [email protected]
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    ralphc> I don't have a lot to add to this other than I looked at
    ralphc> the assembly code output for -Os and -O3 and both looked
    ralphc> OK.  I put the mb() in to be sure the writes were complete
    ralphc> and I found this to work by experimentation.  Without it,
    ralphc> the driver fails to read the EEPROM correctly.

Hmm, that doesn't give me a warm fuzzy feeling.  Basically on x86-64
you're adding an unneeded mfence instruction to work around
miscompilation?

Is i2c_wait_for_writes miscompiled without the mb() with -Os?  What
does the bad assembly look like?

 - R.
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