Re: [PATCH] i386: PAE entries must have their low word cleared first

Brunner, Richard wrote:

Maybe the barrier is needed for other architectures, but two writes

to WB memory are not going to happen out of order and so no
barrier is needed on x86 to the best of my knowledge.

The barrier here is just a compiler barrier - wmb on x86 is just asm volatile ("" ::: "memory"); This is needed to stop gcc reordering the stores - not because the processor does respect them.

Zach
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to [email protected]
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

---

• Follow-Ups:
  • Re: [PATCH] i386: PAE entries must have their low word cleared first
    • From: Zachary Amsden <[email protected]>

• References:
  • RE: [PATCH] i386: PAE entries must have their low word cleared first
    • From: "Brunner, Richard" <[email protected]>

• Prev by Date: Some Concrete AppArmor Questions - was Re: [RFC][PATCH 0/11] security: AppArmor - Overview
• Next by Date: Re: [PATCH] i386: PAE entries must have their low word cleared first
• Previous by thread: RE: [PATCH] i386: PAE entries must have their low word cleared first
• Next by thread: Re: [PATCH] i386: PAE entries must have their low word cleared first
• Index(es):
  • Date
  • Thread

[Index of Archives]     [Kernel Newbies]     [Netfilter]     [Bugtraq]     [Photo]     [Stuff]     [Gimp]     [Yosemite News]     [MIPS Linux]     [ARM Linux]     [Linux Security]     [Linux RAID]     [Video 4 Linux]     [Linux for the blind]     [Linux Resources]