On Thu, 30 Mar 2006, Chen, Kenneth W wrote:
> > > See, no memory ordering there, because clear_bit already has a LOCK prefix.
> No, not the memory ordering semantics you are thinking about. It just tell
> compiler not to be over smart and schedule a load operation above that point
> Intel compiler is good at schedule memory load way ahead of its use to hide
> memory latency. gcc probably does that too, I'm not 100% sure. This prevents
> the compiler to schedule load before that line.
The compiler? I thought we were talking about the processor.
I was referring to the LOCK prefix. Doesnt that insure the processor to
go into a special state and make the bus go into a special state that
implies a barrier?
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