Re: [patch] s3c2412 support

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Ben Dooks wrote:

It would help to split these emails into smaller chunks than all the files
so that comments could be with the chunks that it goes with.
All right, i'll repost in a minute..

Makefile.diff	- going to have to remove those #s at somepoint
True, but i can't submit those as long as i use tomtom specific cpu-type registers (see reply to other post later today).
regs-clock.diff - didn't need to add s3c2412_get_pll, same as s3c2410_get_pll
Hmm, i disagree.. The term (mdiv+8) is multiplied by 2 for s3c2412, this is not the case for s3c2410.. I changed it to use the 64 bit arithmetic like s3c2410_get_pll and you'll notice the difference is this line:
+       fvco = (uint64_t)baseclk * ((mdiv + 8)<<1);

Maybe it is better to use one get_pll and add an extra parameter to indicate the multiplication of (mdiv+8) ?
regs-gpio.diff	- group the s3c2412 changes together into larger #ifdefs

regs-rtc.diff	- two sets of changes here? 2410 and 2412 additions
Ok, cleaned that up..


the 2412 is an ARM926EJS, so I'd expect the core-ID accessed
via the co-processor registers to be diffeernt, so this could give
the indication of what sort of CPU to try.

this also seems to have the S3C2442 ID patch from the patch-q in it,
please be careful about merging patches like that.
Ok, cleaned that up a bit too.. As for the core-ID remark, i will try and have a look at it today, but as it is my last day at this firm today i can't make any guarantees. Maybe Dimitry Andric will pick this up when i'm gone..


K.F.J. Martens, Sonologic,
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