On Fri, Jan 27, 2006 at 02:02:47PM -0800, Zach Brown wrote:
> [x86] align per-cpu section to configured cache bytes
>
> This matches the fix for a bug seen on x86-64. Test booted on old hardware
> that had 32 byte cachelines to begin with.
>
> Signed-off-by: Zach Brown <[email protected]>
I've applied this verbatim.
The asm-generic part suggested in other mail was not straightforward due
to subtle differences and I have not yet my cross compile environment
running on this box.
Sam
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