* Nicolas Pitre <[email protected]> wrote:
> > i'm curious, how would this ARMv6 solution look like, and what would be
> > the advantages over the atomic swap based variant?
>
> On ARMv6 (which can be SMP) the atomic swap instruction is much more
> costly than on former ARM versions. It however has ll/sc instructions
> which allows it to implement a true atomic decrement, and the lock
> fast path would look like: [...]
but couldnt you implement atomic_dec_return() with the ll/sc
instructions? Something like:
repeat:
ldrex r1, [r0]
sub r1, r1, #1
strex r2, r1, [r0]
orrs r0, r2, r1
jneq repeat
(shot-in-the-dark guess at ARMv6 assembly)
hm?
Ingo
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