On Thu, 2005-11-10 at 11:56 -0800, Linus Torvalds wrote:
>
> On Thu, 10 Nov 2005, Andrew Morton wrote:
> >
> > IOW we're assuming that no 32-bit architectures will obtain pagetables from
> > slab?
>
> I thought ARM does?
>
> The ARM page tables are something strange (I think they have 1024-byte
> page tables and 4kB pages or something like that?). So they'll not only
> obtain the page tables from slab, they have four of them per page.
Just catching up on old mails... ppc64 also gets page tables from kmem
caches (though they are currently page sized & aligned). We really want
to be able to have more freedom and get away from the current idea that
1 PTE page == one page. Our intermediary levels (PMDs, PUDs, PGDs)
already have various random sizes.
Ben.
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