Hi,
On Sat, 1 Oct 2005, Ingo Molnar wrote:
> > Do you have any numbers (besides maybe microbenchmarks) that show a
> > real advantage by using per cpu data? What kind of usage do you expect
> > here?
>
> it has countless advantages, and these days we basically only design
> per-CPU data structures within the kernel, unless some limitation (such
> as API or hw property) forces us to do otherwise. So i turn around the
> question: what would be your reason for _not_ doing this clean per-CPU
> design for SMP systems?
Did I say I'm against it? No, I was just hoping someone put some more
thought into it than just "all the other kids are doing it".
I was just curious how well it really scales compared to the simple
version, e.g. what happens if most timer end up on a single cpu or what
happens if we want to start the timer on a different cpu. Is this so wrong
that you have to go into attack mode? :(
> > The other thing is that this assumes, that all time sources are
> > programmable per cpu, otherwise it will be more complicated for a time
> > source to run the timers for every cpu, I don't know how safe that
> > assumption is. Changing the array of structures into an array of
> > pointers to the structures would allow to switch between percpu bases
> > and a single base.
>
> yeah, and that's an assumption that simplifies things on SMP
> significantly. PIT on SMP systems for HRT is so gross that it's not
> funny. If anyone wants to revive that notion, please do a separate patch
> and make the case convincing enough ...
Why do use "PIT on SMP" as an extreme example to reject the general
concept completely? This doesn't explain, why first such a (simple) SMP
design shouldn't exist and why secondly my suggestion is such a big
problem.
bye, Roman
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