Brett Russ wrote:
Jeff Garzik wrote:
Staring at the docs a bit, I notice that the 50xx and 60xx have SATA
S{status,control,error} registers at different locations.
Yes and also even some registers that are at the same location have
changed bit definitions. Aye caramba.
Best solution will probably be to create separate enums for each chip
generation, in addition to a common enum, and point to the relevant one
based on the chip identifier.
No surprise we're seeing so many problems. I have just not spent any
time at all on 5xxx. Probably should yank it from the pci device table
for now.
I would suggest submitting a patch to put #if 0 around the PCI table
entries, so that testers can easily turn it back on...
Jeff
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