Luke Kenneth Casson Leighton writes:
> On Tue, Oct 04, 2005 at 09:15:57PM +0400, Nikita Danilov wrote:
> > Luke Kenneth Casson Leighton writes:
> >
> > [...]
> >
> > >
> > > assuming that you have an intelligent programmer (or some really good
> > > and working parallelisation tools) who really knows his threads?
> >
> > Well, I'd like to have a hardware with CAS-n operation for one
> > thing.
>
> CAS - compare and swap - by CAS-n i presume that you mean effectively a
> SIMD CAS instruction?
An instruction that atomically compares and swaps n independent memory
locations with n given values. cas-1 (traditional compare-and-swap) is
enough to implement lock-less queue, cas-2 is enough to implement
double-linked lists, and was used by Synthesis lock-free kernel
(http://citeseer.ist.psu.edu/massalin91lockfree.html).
To be precise, cas-1 is theoretically enough to implement double-linked
lists too, but resulting algorithms are not pretty at all.
>
> > But what would this buy us?
>
> you do not say :) i am genuinely interested to hear what it would buy.
Nothing. That was an instance of "rhetorical question", sorry that I
made not this clear enough.
>
> > Having different kernel algorithms
> > for x86 and mythical cas-n-able hardware is not viable.
>
> if i can get an NPTL .deb package for glibc for x86 only it would tend
> to imply that that isn't a valid conclusion: am i missing something?
Yes: this is Linux _Kernel_ mailing list, and I was talking about kernel
code and kernel algorithms.
>
> cheers,
>
> l.
>
Nikita.
>
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