On Tue, 13 Sep 2005, Adam Kropelin wrote:
>
> That made me do some grepping of my own. Nothing obvious, but this bit
> from drivers/scsi/qla2xxx/qla_init.c seems a little odd:
>
> uint16_t w, mwi;
> ...
> /* Reset expansion ROM address decode enable */
> pci_read_config_word(ha->pdev, PCI_ROM_ADDRESS, &w);
> w &= ~PCI_ROM_ADDRESS_ENABLE;
> pci_write_config_word(ha->pdev, PCI_ROM_ADDRESS, w);
>
> Is the address register really only 16 bits wide on some hw?
Nope.
_Most_ hardware will "do the right thing" when you do a sub-word write.
So these things often work (eg, the ROM enable code that used byte writes
probably worked fine - as long as the high bytes already matched the
expectations).
But I think the spec says that you should always write a whole dword at a
time for all the dword registers, and some hardware will literally do the
wrong thing if you try to update things a byte at a time.
So the above probably works fine, especially since it's just disabling the
ROM (ie we don't end up caring at all about the upper bits even if they
did get the wrong value). But it's definitely bad practice, and there are
probably cards (for which that driver is irrelevant, of course ;) where
doing something like the above might not work at all.
Linus
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