Jan Engelhardt wrote:
On Jan 8 2007 00:02, dean gaudet wrote:
On Fri, 5 Jan 2007, Jan Engelhardt wrote:
On Jan 4 2007 17:48, H. Peter Anvin wrote:
[i386] All Transmeta CPUs have constant TSCs
All Transmeta CPUs ever produced have constant-rate TSCs.
A TSC is ticking according to the CPU frequency, is not it?
transmeta decided years before intel and amd that a constant rate tsc
(unaffected by P-state) was the only sane choice. on transmeta cpus the
tsc increments at the maximum cpu frequency no matter what the P-state
(and no matter what longrun is doing behind the kernel's back).
mind you, many people thought this was a crazy choice at the time...
Well it defeats the purpose of TSC. I mean, they could have kept the "TSC" and
instead added a second TSC ticker, constant_tsc.
It depends on what "the purpose of TSC" is. The original spec is
ambiguous if the TSC counts wall time or CPU time, since there was no
distinction when the spec was made. The more common usage, however, was
to count wall time; the relatively few users who care about CPU cycles
(especially when the CPU is degraded) can be serviced via an RDPMC counter.
I *definitely* support the concept that RDPMC 0 should could CPU cycles
by convention in Linux.
-hpa
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