Alan wrote:
This is a slight variant on the patch I posted December 16th to fix
libata combined mode handling. The only real change is that we now
correctly also reserve BAR1,2,4. That is basically a neatness issue.
Jeff was unhappy about two things
1. That it didn't work in the case of one channel native one channel
legacy.
This is a silly complaint because the SFF layer in libata doesn't handle
this case yet anyway.
Yes, it's "silly" people people use configurations you find inconvenient.
At least one embedded x86 case cares, that I know of. They only needed
to make two minor changes to make it work.
2. The case where combined mode is in use and IDE=n.
In this case the libata quirk code reserves the resources in question
correctly already.
Not /all/ the resources. And YOU were the person harping me about
acquiring all resources, so that even races no one cares about[1] are
avoided.
But those two items were just from my five-minute, on-vacation review.
Obvious bug #3:
The code no long reserves resources for the "extra" PCI BAR that often
exists on PCI controllers regardless of legacy/native mode. Previously,
the code called pci_request_regions() to reserve ALL regions attached to
the PCI device.
You have suddenly decided that it's OK to --not reserve at all-- these
additional regions.
Proof: The AHCI PCI BAR (#5, zero-based) is clearly NOT reserved, even
though we talk to it, in piix_disable_ahci() of ata_piix.c.
Jeff
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