> However, assuming a bus clock of 6 MHz should be safe (167 ns). Agreed - or ISA timings directly. Boxes using WD80x3 are not going to have a TSC so might as well stick with port 0x80 as they have done just fine for the past 15 years. > None of this really helps with *memory-mapped* 8390, though, since > memory mapped writes can be posted. Putting any IOIO transaction in the ISA isn't posted only PCI. PCI 8390 clones seem to be a mix of ASICs and 8390x chips with some quite disgusting FPGA glue logic. Alan -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
- Follow-Ups:
- Re: [PATCH] x86: provide a DMI based port 0x80 I/O delay override
- From: "H. Peter Anvin" <[email protected]>
- Re: [PATCH] x86: provide a DMI based port 0x80 I/O delay override
- References:
- [PATCH] x86: provide a DMI based port 0x80 I/O delay override
- From: Rene Herman <[email protected]>
- Re: [PATCH] x86: provide a DMI based port 0x80 I/O delay override
- From: Rene Herman <[email protected]>
- Re: [PATCH] x86: provide a DMI based port 0x80 I/O delay override
- From: Alan Cox <[email protected]>
- Re: [PATCH] x86: provide a DMI based port 0x80 I/O delay override
- From: Ondrej Zary <[email protected]>
- Re: [PATCH] x86: provide a DMI based port 0x80 I/O delay override
- From: Alan Cox <[email protected]>
- Re: [PATCH] x86: provide a DMI based port 0x80 I/O delay override
- From: "H. Peter Anvin" <[email protected]>
- [PATCH] x86: provide a DMI based port 0x80 I/O delay override
- Prev by Date: Re: getting rid of filp search in fs_may_remount_ro()
- Next by Date: Re: [PATCH] x86: provide a DMI based port 0x80 I/O delay override
- Previous by thread: Re: [PATCH] x86: provide a DMI based port 0x80 I/O delay override
- Next by thread: Re: [PATCH] x86: provide a DMI based port 0x80 I/O delay override
- Index(es):
 |