> But that does't mean that other ports won't have the same timings. Also,
> it doesn't mean that we really need to have exactly *those* timings.
For ISA bus you want "at least" those timings. That is an easy case
anyway - ISA bus boxes, old processors and generally no TSC so we can
fall back to 0x80 - we know from 15 years experience the problem only
occurs with recent non ISA systems that have borked firmware.
Lots of ISA hardware does really need the delays and most of it will be
on old processors as well naturally enough.
> I also think that the worries about PCI write posting are unnecessary. IO
> port accesses (ie a regular "inb()" and "outb()" even _without_ the "_p()"
> format slowdown) are already synchronous not only by the CPU but by all
Ok then the SCSI examples should be fine (although as I said I think they
are possibly bogus anyway)
Alan
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